1. Technical Field
Various embodiments of the inventive concept generally relate to a semiconductor integrated circuit device, and more particularly, to a clock generation circuit and method, and a semiconductor apparatus and electronic system using the same.
2. Related Art
Semiconductor apparatuses process data in synchronization with an external clock.
High-speed semiconductor apparatuses generate an internal clock in which the external clock is delayed for a certain time using a delay locked loop (DLL), and control the data to be accurately output at an edge of the external clock.
The semiconductor apparatuses may generate multiphase clock signals. The multiphase clock signals are generated by dividing the internal clock. The semiconductor apparatuses accurately output data at high speed in synchronization with the multiphase clock signals. Accordingly, data may be accurately output at high-speeds if the limits on the high-speed operation are improved.
The divided multiphase internal clocks have to be restored to the internal clock having an original period, and a duty of the restored clock may be affected by the phases of the divided multiphase internal clocks.